Traces is a Research group on Architectures and Compilers for Embedded Systems. It belongs to the Institut de Recherche en Informatique de Toulouse.

Our current activities focus on the timing analysis of time-critical systems. This includes determining worst-case execution times (WCET) and supporting safe task scheduling.

We develop OTAWA, an open-source toolset dedicated to static WCET analysis.

Latest news

  • Open PhD position with Continental Automotive

    The objective is to design heterogeneous clusters for real-time applications. The PhD is to be started as soon as possible. All details here:  PhD with Continental.

  • Workshop CAPITAL

    Thomas Carle is organizing the CAPITAL Workshop in Toulouse. See more information here.

  • Zhenyu Bai defends his PhD

    Zhenyu Bai defends his PhD “MODELISATION DU COMPORTEMENT TEMPOREL DU PIPELINE POUR LE CALCUL DE WCET” (Modeling the timing behavior of the pipeline to compute WCETs)

  • Kick-off of the ProTiPP project

    This project is funded for 48 months par the French Research Agency (ANR).

  • HiPEAC conference in Toulouse

    The 2023 HiPEAC conference was held in Toulouse at the Beaudis conference center and gathered more than 540 researchers and industrials for 3 days. Christine Rochange and Thomas Carle were part of the organization committee. More info:

  • A paper in IEEE Transactions on computers

    The following paper has been accepted for publication in IEEE Transactions on Computers:

    MINOTAuR: a Timing Predictable RISC-V Core Featuring Speculative Execution.
    Alban Gruin, Thomas Carle, Christine Rochange, Hugues Cassé, Pascal Sainrat

  • ACACES summer school

    Alban and Michaël participate in the ACACES summer school of the HiPEAC Network of Excellence.

  • Two papers at ECRTS’22.

    The two following papers will be presented at ECRTS in Modena, Italy:

    ACETONE: Predictable programming framework for ML applications in safety-critical systems
    Iryna De Albuquerque Silva (ANITI/ONERA), Thomas Carle (IRIT – Univ Toulouse 3), Adrien Gauffriau (Airbus), Claire Pagetti (ONERA)

    Correctness and Efficiency Criteria for the Multi-Phase Task Model
    Rémi Meunier (AUSY – IRIT – INSA), Thomas Carle (IRIT – Université Toulouse 3), Thierry Monteil (IRIT –  INSA)

  • Kick-off of the MeSCAliNe project

    The kick-off meeting of the MeSCAliNe project (ANR JCJC led by Thomas Carle) was held on May 23rd at IRIT. Take a visit to the project website!

  • MINOTAuR presented at the RISC-V Week

    Alban Gruin presented MINOTAuR, our timing-predictable processor, at the RISC-V Week that was held in Paris on May 3-5,2022. See his poster here and the abstract here.

  • PasTiS presented at ERTS2022

    On June 1-2, Michaël Adalbert will present at ERTS2022 a preliminary version of PasTiS, a cycle-accurate simulator that is intended to reflect the behavior of an Nvidia Pascal GPU.

  • A paper in ACM Transactions on Embedded Computing Systems

    Our paper on the effectiveness of eXecution Decision Diagrams for WCET analysis will be published in ACM Transactions on Embedded Computing Systems. It is already available online: