2023
Verification of Processors Timing Models Using Cycle-Accurate Timing Simulators.
Alban Gruin, Thomas Carle, Christine Rochange, and Pascal Sainrat
Workshop on WCET Analysis, Jul 2023
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Warp-level CFG construction for GPU kernel WCET analysis.
Louison Jeanmougin, Pascal Sotin, Christine Rochange, Thomas Carle
Workshop on WCET Analysis, Jul 2023
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Enabling timing predictability in the presence of store buffers.
Alban Gruin, Thomas Carle, Christine Rochange, Pascal Sainrat
International Conference on Real-Time Networks and Systems (RTNS), Jun 2023
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Computing Execution Times with eXecution Decision Diagrams in the Presence of Out-Of-Order Resources.
Zhenyu Bai, Hugues Cassé, Thomas Carle, Christine Rochange
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, March 2023 (early access)
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MINOTAuR: a Timing Predictable RISC-V Core Featuring Speculative Execution.
Alban Gruin, Thomas Carle, Christine Rochange, Hugues Cassé, Pascal Sainrat
IEEE Transactions on Computers, 72(1), Jan 2023
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2022
Correctness and Efficiency Criteria for the Multi-Phase Task Model.
Rémi Meunier, Thomas Carle, Thierry Monteil.
34th Euromicro Conference on Real-Time Systems (ECRTS), Jul 2022.
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ACETONE: Predictable Programming Framework for ML Applications in Safety-Critical Systems.
Iryna De Albuquerque Silva, Thomas Carle, Adrien Gauffriau, Claire Pagetti.
34th Euromicro Conference on Real-Time Systems (ECRTS), Jun 2022.
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PasTiS: building an NVIDIA Pascal GPU simulator for embedded AI applications.
Michaël Adalbert, Thomas Carle, Christine Rochange.
11th European Congress on Embedded Real-Time Systems (ERTS), Jun 2022.
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A Framework for Calculating WCET Based on Execution Decision Diagrams.
Zhenyu Bai, Hugues Cassé, Marianne de Michiel, Christine Rochange, Thomas Carle.
ACM Transactions on Embedded Computing Systems (TECS), 21 (3), 2022. PDF.
2021
Speculative Execution and Timing Predictability in an Open Source RISC-V Core.
Alban Gruin, Thomas Carle, Hugues Cassé, Christine Rochange.
IEEE Real-Time Systems Symposium (RTSS), Dec 2021.
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Static Extraction of Memory Access Profiles for Multi-core Interference Analysis of Real-Time Tasks.
Thomas Carle, Hugues Cassé.
34th International Conference on Architecture of Computing Systems (ARCS), Jun 2021.
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Data Cache Analysis by Counting Integer Points.
Pascal Sotin, Quentin Vermande, Hugues Cassé.
29th International Conference on Real-Time Networks and Systems (RTNS), Apr 2021.
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2020
Improving the Performance of WCET Analysis in the Presence of Variable Latencies.
Zhenyu Bai, Hugues Cassé, Marianne de Michiel, Thomas Carle, Christine Rochange.
21st ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES), Jun 2020.
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Build Your Own Static WCET analyser: the Case of the Automotive Processor AURIX TC275.
Wei-Tsun Sun, Eric Jenn, Hugues Cassé.
10th European Congress on Embedded Real Time Software and Systems (ERTS), Jan 2020. PDF