About me
I am currently a lecturer at University Toulouse III, and member of the TRACES research team at IRIT. My teaching focus is on computer architectures, parallel programming, real-time systems and compilation. My research interests concern time-predictability of computer systems, with a focus on parallel hardware targets. In particular, I consider the compilation of real-time embedded systems, and especially the integration of the real-time aspects (WCET analysis, scheduling) to the automatic compilation process for complex parallel architectures (multi/many-core, GPGPUs).
Formerly:
- IRT SystemX (Kronosafe): formal methods for the verification of critical real-time applications in the ASTERIOS framework
- Brown University (I. Bahar and M. Herlihy): dynamic memory management for Multiprocessor System-on-Chips with transactional memory
- INRIA Paris-Rocquencourt (D. Potop): PhD on automatic generation of correct-by-construction multi-processor embedded hard real-time systems
Research topics
- Real-time systems
- Compilation, automatic code generation
- Static analysis and scheduling
- Parallel hardware and software
- Transactional memory
Current research
- Fine-grain static analysis of interference in multicore architectures
- WCET analysis for GPU targets
- High-performance timing-predictable processors
Teaching
- Real-time systems implementation (M2)
- Processor implementation in VHDL (M2)
- Parallel architectures and OpenMP programming (L3)
- CUDA programming (M1)
- Compilation (M1)
- Computer architectures (L2)