Publications

Journals:

I. De Albuquerque Silva, T. Carle, A. Gauffriau, C. Pagetti. Extending a predictable machine learning framework with efficient gemm-based convolution routines. Real-Time Systems Journal. 2023

Z. Bai, H. Cassé, T. Carle, C. Rochange. Computing Execution Times with eXecution Decision Diagrams in the Presence of Out-Of-Order Resources. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 2023

A. Gruin, T. Carle, C. Rochange , H. Cassé, P. Sainrat. MINOTAuR: A Timing Predictable RISC-V Core Featuring Speculative Execution. IEEE Transactions on Computers. 2023

Z. Bai, H. Cassé, M. De Michiel, T. Carle, C. Rochange. A Framework for Calculating WCET Based on Execution Decision Diagram. ACM Transactions on Embedded Computing Systems (TECS). 2022.

T. Carle, D. Potop-Butucaru, Y. Sorel, D. Lesens. From dataflow specification to multiprocessor partitioned time-triggered real-time implementation. Leibniz Transactions on Embedded Systems (LITES), 2015

T. Carle, D. Potop-Butucaru. Predicate-aware, makespan-preserving software pipelining of scheduling tables. ACM Transactions on Architecture and Code Optimization (TACO), 2014

International conferences:

A. Gruin, T. Carle, C. Rochange, P. Sainrat. Enabling timing predictability in the presence of store buffers. 31st International Conference on Real-Time Networks and Systems (RTNS 23). 2023

R. Meunier, T. Carle, T. Monteil. Correctness and Efficiency Criteria for the Multi-Phase Task Model. 34th Euromicro Conference on Real-Time Systems (ECRTS ’22). 2022

I. De Albuquerque Silva, T. Carle, A. Gauffriau, C. Pagetti. ACETONE: Predictable programming framework for ML applications in safety-critical systems. 34th Euromicro Conference on Real-Time Systems (ECRTS ’22). 2022

M. Adalbert, T. Carle, C. Rochange. PasTiS: building an NVIDIA Pascal GPU simulator for embedded AI applications. ERTS 2022.

A. Gruin, T. Carle, H. Cassé, C. Rochange. Speculative Execution and Timing Predictability in an Open Source RISC-V Core. 2021 IEEE Real-Time Systems Symposium (RTSS) **Outstanding paper award**

T. Carle, H. Cassé. Static Extraction of Memory Access Profiles for Multi-core Interference Analysis of Real-time Tasks. 34th International Conference on Architecture of Computing Systems. ARCS ’21

Z. Bai, H. Cassé, M. De Michiel, T. Carle, C. Rochange. Improving the Performance of WCET Analysis in the Presence of Variable Latencies. 21st ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES ’20)

T. Carle, D. Papagiannopoulou, T. Moreshet, A. Marongiu, M. Herlihy, R. I. Bahar. Thrifty-malloc: A HW/SW codesign for the dynamic management of hardware transactional memory in embedded multicore systems. International conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES ´16)

R. Gorcitz, E. Kofman, T. Carle, D. Potop-Butucaru, R. de Simone. On the Scalability of Constraint Solving for Static/Off-Line Real-Time Scheduling. 13th International Conference on Formal Modeling and Analysis of Timed Systems, FORMATS 2015

R. Gorcitz, T. Carle, D. Lesens, D. Monchaux, D. Potop-Butucaru, Y. Sorel. Automatic implementation of TTEthernet-based time-triggered avionics applications. 20th Data Systems In Aerospace Conference, DASIA 2015

T. Carle, M. Djemal, D. Potop-Butucaru, R. de Simone, Z. Zhang. Static Mapping of Real-Time Applications onto Massively Parallel Processor Arrays. 14th International conference on Application of Concurrency to System Design, ACSD 2014

T. Carle, M. Djemal, D. Genius, F. Pêcheux, D. Potop-Butucaru, R. de Simone, F. Wajsbürt, Z. Zhang. Reconciling performance and predictability on a many-core through off-line mapping. 9th International Symposium on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2014

International workshops with review committee:

A. Gruin, T. Carle, C. Rochange, P. Sainrat. Validation of Processor Timing Models Using Cycle-Accurate Timing Simulators. 21th International Workshop on Worst-Case Execution Time Analysis (WCET 23). 2023

L. Jeanmougin, P. Sotin, C. Rochange, T. Carle. Warp-Level CFG Construction for GPU Kernel WCET Analysis. 21th International Workshop on Worst-Case Execution Time Analysis (WCET 23). 2023

T. Carle, H. Cassé. Reducing Timing Interferences in Real-Time Applications Running on Multicore Architectures. International Workshop on Worst-Case Execution Time Analysis (WCET ’18).

T. Carle, D. Papagiannopoulou, T. Moreshet, A. Marongiu, M. Herlihe, R. I. Bahar. A transaction-friendly dynamic memory manager for embedded multicore systems. description de la publication 7th Workshop on the Theory of Transactional Memory 2015 (WTTM ’15)

Thesis:

T. Carle. Efficient compilation of embedded control specifications with complex functional and non-functional properties. 31 Octobre 2014

Thème : Overlay par Kaira. Texte supplémentaire
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