DecaDuino.h File Reference

#include "Arduino.h"

Go to the source code of this file.

Classes
class	DecaDuino

Macros
#define	DW1000_IRQ0_PIN   9
#define	DW1000_IRQ1_PIN   0
#define	DW1000_IRQ2_PIN   1
#define	DW1000_CS0_PIN   10
#define	DW1000_CS1_PIN   10
#define	DW1000_CS2_PIN   10
#define	MAX_NB_DW1000_FOR_INTERRUPTS   32
#define	DEBUG_STR_LEN   256
#define	RANGING_ERROR   0x00
#define	DW1000_TIMEBASE   15.65E-12
#define	AIR_SPEED_OF_LIGHT   282622876.092008
#define	RANGING_UNIT   AIR_SPEED_OF_LIGHT*DW1000_TIMEBASE
#define	DWM1000_DEFAULT_ANTENNA_DELAY_VALUE   32847
#define	DW1000_TRX_STATUS_IDLE   0
#define	DW1000_TRX_STATUS_TX   1
#define	DW1000_TRX_STATUS_RX   2
#define	DW1000_TRX_STATUS_SLEEP   3
#define	DW1000_REGISTER_DEV_ID   0x00
#define	DW1000_REGISTER_EUI   0x01
#define	DW1000_REGISTER_PANADR   0x03
#define	DW1000_REGISTER_PANADR_SHORT_ADDRESS_OFFSET   0x00
#define	DW1000_REGISTER_PANADR_PANID_OFFSET   0x02
#define	DW1000_REGISTER_SYS_CFG   0x04
#define	DW1000_REGISTER_SYS_CFG_RXAUTR_MASK   0x20000000
#define	DW1000_REGISTER_SYS_CFG_PHR_MODE_MASK   0x00030000
#define	DW1000_REGISTER_SYS_CFG_PHR_MODE_SHIFT   16
#define	DW1000_REGISTER_SYS_TIME   0x06
#define	DW1000_REGISTER_TX_FCTRL   0x08
#define	DW1000_REGISTER_TX_FCTRL_FRAME_LENGTH_MASK   0x000003FF
#define	DW1000_REGISTER_TX_BUFFER   0x09
#define	DW1000_REGISTER_DX_TIME   0x0A
#define	DW1000_REGISTER_SYS_CTRL   0x0D
#define	DW1000_REGISTER_SYS_CTRL_TXSTRT_MASK   0x00000002
#define	DW1000_REGISTER_SYS_CTRL_TXDLYS_MASK   0x00000004
#define	DW1000_REGISTER_SYS_CTRL_TRXOFF_MASK   0x00000040
#define	DW1000_REGISTER_SYS_CTRL_RXENAB_MASK   0x00000100
#define	DW1000_REGISTER_SYS_MASK   0x0E
#define	DW1000_REGISTER_SYS_MASK_MTXFRS_MASK   0x00000080
#define	DW1000_REGISTER_SYS_MASK_MRXDFR_MASK   0x00002000
#define	DW1000_REGISTER_SYS_MASK_MRXFCG_MASK   0x00004000
#define	DW1000_REGISTER_SYS_STATUS   0x0F
#define	DW1000_REGISTER_SYS_STATUS_IRQS_MASK   0x00000001
#define	DW1000_REGISTER_SYS_STATUS_TXFRS_MASK   0x00000080
#define	DW1000_REGISTER_SYS_STATUS_LDEDONE_MASK   0x00000400
#define	DW1000_REGISTER_SYS_STATUS_RXDFR_MASK   0x00002000
#define	DW1000_REGISTER_SYS_STATUS_RXFCG_MASK   0x00004000
#define	DW1000_REGISTER_SYS_STATUS_RXFCE_MASK   0x00008000
#define	DW1000_REGISTER_RX_FINFO   0x10
#define	DW1000_REGISTER_RX_FINFO_RXFLEN_MASK   0x000003FF
#define	DW1000_REGISTER_RX_BUFFER   0x11
#define	DW1000_REGISTER_RX_RFQUAL   0x12
#define	DW1000_REGISTER_RX_TTCKI   0x13
#define	DW1000_REGISTER_RX_TTCKO   0x14
#define	DW1000_REGISTER_RX_TIME   0x15
#define	DW1000_REGISTER_TX_TIME   0x17
#define	DW1000_REGISTER_TX_ANTD   0x18
#define	DW1000_REGISTER_CHAN_CTRL   0x1F
#define	DW1000_REGISTER_CHAN_CTRL_TX_CHAN_MASK   0x0000000F
#define	DW1000_REGISTER_CHAN_CTRL_RX_CHAN_MASK   0x000000F0
#define	DW1000_REGISTER_CHAN_CTRL_RXPRF_MASK   0x000C0000
#define	DW1000_REGISTER_CHAN_CTRL_TX_PCODE_MASK   0x07C00000
#define	DW1000_REGISTER_CHAN_CTRL_RX_PCODE_MASK   0xF8000000
#define	DW1000_REGISTER_AON_CTRL   0x2C
#define	DW1000_REGISTER_OFFSET_AON_CTRL   0x02
#define	DW1000_REGISTER_AON_CTRL_UPL_CFG_MASK   0x04
#define	DW1000_REGISTER_AON_CFG0   0x2C
#define	DW1000_REGISTER_OFFSET_AON_CFG0   0x06
#define	DW1000_REGISTER_AON_CFG0_SLEEP_EN_MASK   0x01
#define	DW1000_REGISTER_AON_CFG0_WAKE_PIN_MASK   0x02
#define	DW1000_REGISTER_AON_CFG0_WAKE_SPI_MASK   0x04
#define	DW1000_REGISTER_AON_CFG0_WAKE_CNT_MASK   0x08
#define	DW1000_REGISTER_AON_CFG0_LPDIV_EN_MASK   0x10
#define	DW1000_REGISTER_PMSC_CTRL0   0x36
#define	DW1000_REGISTER_OFFSET_PMSC_CTRL0   0x00
#define	DW1000_REGISTER_PMSC_CTRL1   0x36
#define	DW1000_REGISTER_OFFSET_PMSC_CTRL1   0x04

Macro Definition Documentation

AIR_SPEED_OF_LIGHT

#define AIR_SPEED_OF_LIGHT   282622876.092008

DEBUG_STR_LEN

#define DEBUG_STR_LEN   256

DW1000_CS0_PIN

#define DW1000_CS0_PIN   10

DW1000_CS1_PIN

#define DW1000_CS1_PIN   10

DW1000_CS2_PIN

#define DW1000_CS2_PIN   10

DW1000_IRQ0_PIN

#define DW1000_IRQ0_PIN   9

DW1000_IRQ1_PIN

#define DW1000_IRQ1_PIN   0

DW1000_IRQ2_PIN

#define DW1000_IRQ2_PIN   1

DW1000_REGISTER_AON_CFG0

#define DW1000_REGISTER_AON_CFG0   0x2C

DW1000_REGISTER_AON_CFG0_LPDIV_EN_MASK

#define DW1000_REGISTER_AON_CFG0_LPDIV_EN_MASK   0x10

DW1000_REGISTER_AON_CFG0_SLEEP_EN_MASK

#define DW1000_REGISTER_AON_CFG0_SLEEP_EN_MASK   0x01

DW1000_REGISTER_AON_CFG0_WAKE_CNT_MASK

#define DW1000_REGISTER_AON_CFG0_WAKE_CNT_MASK   0x08

DW1000_REGISTER_AON_CFG0_WAKE_PIN_MASK

#define DW1000_REGISTER_AON_CFG0_WAKE_PIN_MASK   0x02

DW1000_REGISTER_AON_CFG0_WAKE_SPI_MASK

#define DW1000_REGISTER_AON_CFG0_WAKE_SPI_MASK   0x04

DW1000_REGISTER_AON_CTRL

#define DW1000_REGISTER_AON_CTRL   0x2C

DW1000_REGISTER_AON_CTRL_UPL_CFG_MASK

#define DW1000_REGISTER_AON_CTRL_UPL_CFG_MASK   0x04

DW1000_REGISTER_CHAN_CTRL

#define DW1000_REGISTER_CHAN_CTRL   0x1F

DW1000_REGISTER_CHAN_CTRL_RX_CHAN_MASK

#define DW1000_REGISTER_CHAN_CTRL_RX_CHAN_MASK   0x000000F0

DW1000_REGISTER_CHAN_CTRL_RX_PCODE_MASK

#define DW1000_REGISTER_CHAN_CTRL_RX_PCODE_MASK   0xF8000000

DW1000_REGISTER_CHAN_CTRL_RXPRF_MASK

#define DW1000_REGISTER_CHAN_CTRL_RXPRF_MASK   0x000C0000

DW1000_REGISTER_CHAN_CTRL_TX_CHAN_MASK

#define DW1000_REGISTER_CHAN_CTRL_TX_CHAN_MASK   0x0000000F

DW1000_REGISTER_CHAN_CTRL_TX_PCODE_MASK

#define DW1000_REGISTER_CHAN_CTRL_TX_PCODE_MASK   0x07C00000

DW1000_REGISTER_DEV_ID

#define DW1000_REGISTER_DEV_ID   0x00

DW1000_REGISTER_DX_TIME

#define DW1000_REGISTER_DX_TIME   0x0A

DW1000_REGISTER_EUI

#define DW1000_REGISTER_EUI   0x01

DW1000_REGISTER_OFFSET_AON_CFG0

#define DW1000_REGISTER_OFFSET_AON_CFG0   0x06

DW1000_REGISTER_OFFSET_AON_CTRL

#define DW1000_REGISTER_OFFSET_AON_CTRL   0x02

DW1000_REGISTER_OFFSET_PMSC_CTRL0

#define DW1000_REGISTER_OFFSET_PMSC_CTRL0   0x00

DW1000_REGISTER_OFFSET_PMSC_CTRL1

#define DW1000_REGISTER_OFFSET_PMSC_CTRL1   0x04

DW1000_REGISTER_PANADR

#define DW1000_REGISTER_PANADR   0x03

DW1000_REGISTER_PANADR_PANID_OFFSET

#define DW1000_REGISTER_PANADR_PANID_OFFSET   0x02

DW1000_REGISTER_PANADR_SHORT_ADDRESS_OFFSET

#define DW1000_REGISTER_PANADR_SHORT_ADDRESS_OFFSET   0x00

DW1000_REGISTER_PMSC_CTRL0

#define DW1000_REGISTER_PMSC_CTRL0   0x36

DW1000_REGISTER_PMSC_CTRL1

#define DW1000_REGISTER_PMSC_CTRL1   0x36

DW1000_REGISTER_RX_BUFFER

#define DW1000_REGISTER_RX_BUFFER   0x11

DW1000_REGISTER_RX_FINFO

#define DW1000_REGISTER_RX_FINFO   0x10

DW1000_REGISTER_RX_FINFO_RXFLEN_MASK

#define DW1000_REGISTER_RX_FINFO_RXFLEN_MASK   0x000003FF

DW1000_REGISTER_RX_RFQUAL

#define DW1000_REGISTER_RX_RFQUAL   0x12

DW1000_REGISTER_RX_TIME

#define DW1000_REGISTER_RX_TIME   0x15

DW1000_REGISTER_RX_TTCKI

#define DW1000_REGISTER_RX_TTCKI   0x13

DW1000_REGISTER_RX_TTCKO

#define DW1000_REGISTER_RX_TTCKO   0x14

DW1000_REGISTER_SYS_CFG

#define DW1000_REGISTER_SYS_CFG   0x04

DW1000_REGISTER_SYS_CFG_PHR_MODE_MASK

#define DW1000_REGISTER_SYS_CFG_PHR_MODE_MASK   0x00030000

DW1000_REGISTER_SYS_CFG_PHR_MODE_SHIFT

#define DW1000_REGISTER_SYS_CFG_PHR_MODE_SHIFT   16

DW1000_REGISTER_SYS_CFG_RXAUTR_MASK

#define DW1000_REGISTER_SYS_CFG_RXAUTR_MASK   0x20000000

DW1000_REGISTER_SYS_CTRL

#define DW1000_REGISTER_SYS_CTRL   0x0D

DW1000_REGISTER_SYS_CTRL_RXENAB_MASK

#define DW1000_REGISTER_SYS_CTRL_RXENAB_MASK   0x00000100

DW1000_REGISTER_SYS_CTRL_TRXOFF_MASK

#define DW1000_REGISTER_SYS_CTRL_TRXOFF_MASK   0x00000040

DW1000_REGISTER_SYS_CTRL_TXDLYS_MASK

#define DW1000_REGISTER_SYS_CTRL_TXDLYS_MASK   0x00000004

DW1000_REGISTER_SYS_CTRL_TXSTRT_MASK

#define DW1000_REGISTER_SYS_CTRL_TXSTRT_MASK   0x00000002

DW1000_REGISTER_SYS_MASK

#define DW1000_REGISTER_SYS_MASK   0x0E

DW1000_REGISTER_SYS_MASK_MRXDFR_MASK

#define DW1000_REGISTER_SYS_MASK_MRXDFR_MASK   0x00002000

DW1000_REGISTER_SYS_MASK_MRXFCG_MASK

#define DW1000_REGISTER_SYS_MASK_MRXFCG_MASK   0x00004000

DW1000_REGISTER_SYS_MASK_MTXFRS_MASK

#define DW1000_REGISTER_SYS_MASK_MTXFRS_MASK   0x00000080

DW1000_REGISTER_SYS_STATUS

#define DW1000_REGISTER_SYS_STATUS   0x0F

DW1000_REGISTER_SYS_STATUS_IRQS_MASK

#define DW1000_REGISTER_SYS_STATUS_IRQS_MASK   0x00000001

DW1000_REGISTER_SYS_STATUS_LDEDONE_MASK

#define DW1000_REGISTER_SYS_STATUS_LDEDONE_MASK   0x00000400

DW1000_REGISTER_SYS_STATUS_RXDFR_MASK

#define DW1000_REGISTER_SYS_STATUS_RXDFR_MASK   0x00002000

DW1000_REGISTER_SYS_STATUS_RXFCE_MASK

#define DW1000_REGISTER_SYS_STATUS_RXFCE_MASK   0x00008000

DW1000_REGISTER_SYS_STATUS_RXFCG_MASK

#define DW1000_REGISTER_SYS_STATUS_RXFCG_MASK   0x00004000

DW1000_REGISTER_SYS_STATUS_TXFRS_MASK

#define DW1000_REGISTER_SYS_STATUS_TXFRS_MASK   0x00000080

DW1000_REGISTER_SYS_TIME

#define DW1000_REGISTER_SYS_TIME   0x06

DW1000_REGISTER_TX_ANTD

#define DW1000_REGISTER_TX_ANTD   0x18

DW1000_REGISTER_TX_BUFFER

#define DW1000_REGISTER_TX_BUFFER   0x09

DW1000_REGISTER_TX_FCTRL

#define DW1000_REGISTER_TX_FCTRL   0x08

DW1000_REGISTER_TX_FCTRL_FRAME_LENGTH_MASK

#define DW1000_REGISTER_TX_FCTRL_FRAME_LENGTH_MASK   0x000003FF

DW1000_REGISTER_TX_TIME

#define DW1000_REGISTER_TX_TIME   0x17

DW1000_TIMEBASE

#define DW1000_TIMEBASE   15.65E-12

DW1000_TRX_STATUS_IDLE

#define DW1000_TRX_STATUS_IDLE   0

DW1000_TRX_STATUS_RX

#define DW1000_TRX_STATUS_RX   2

DW1000_TRX_STATUS_SLEEP

#define DW1000_TRX_STATUS_SLEEP   3

DW1000_TRX_STATUS_TX

#define DW1000_TRX_STATUS_TX   1

DWM1000_DEFAULT_ANTENNA_DELAY_VALUE

#define DWM1000_DEFAULT_ANTENNA_DELAY_VALUE   32847

MAX_NB_DW1000_FOR_INTERRUPTS

#define MAX_NB_DW1000_FOR_INTERRUPTS   32

RANGING_ERROR

#define RANGING_ERROR   0x00

RANGING_UNIT

#define RANGING_UNIT   AIR_SPEED_OF_LIGHT*DW1000_TIMEBASE