Traces is a Research group on Architectures and Compilers for Embedded Systems


Evaluation of Worst-Case Execution Times

The execution time of a program usually depends on the input data. In the context of real-time systems, it is necessary to be able to estimate the Worst-Case Execution Time or WCET. The number of possible execution paths is generally too large to afford measuring each of them. This is why techniques based on static analysis have been proposed. We are interested in extending these techniques to model high performance target architectures.

Incremental WCET evaluation

Participants: Hugues Cassé (leader of the project). All the other members of the team should participate to the development.

Models for advanced architectures

Participants: Jonathan Barre, Claire Burguière, Cédric Landet, Christine Rochange, Pascal Sainrat
[Further details ...]

Predictable timing behaviour: architecture and compilation

The timing behaviour of the components involved in the design of real-time systems should be predictable. However, there is a demand for high performance that requires the use of advanced architectures. Off-the-shelves high performance components are usually hard to analyse. Our goal is to design predictable high performance components and/or to define guidelines to use off-the-shelves components safely.

Predictable instruction scheduling

Participants: Christine Rochange, Pascal Sainrat

Static branch prediction

Participants: Claire Burguière, Christine Rochange, Pascal Sainrat
[Further details ...]


Simulation is a key technique for performance evaluation. It is also involved in WCET evaluation to measure the execution times of small parts of code.

Instruction set simulation

Participants: Tahiry Ratsiambahotra, Pascal Sainrat
[Further details ...]