Traces is a Research group on Architectures and Compilers for Embedded Systems

Papers

2012

Normalisation of Loops with Covariant Variables
Marianne de Michiel, Armelle Bonenfant, Hugues Cassé
Int’l Workshop on Tools for Automatic Program AnalysiS (TAPAS), September 2012
The Split-Phase Synchronisation Technique: Reducing the Pessimism in the WCET Analysis of Parallelised Hard Real-Time Programs
Mike Gerdes, Florian Kluge, Christine Rochange, Theo Ungerer
IEEE Int’l Conf. on Embedded and Real-Time Computing Systems and Applications (RTCSA), August 2012
Operating Systems for Manycore Processors from the Perspective of Safety-Critical Systems
Florian Kluge, Benoît Triquet, Christine Rochange, Theo Ungerer
Int’l Workshop on Operating Systems Platforms for Embedded Real-Time Applications (OSPERT), July 2012
Deterministic Execution Model on COTS Hardware
Frédéric Boniol, Hugues Cassé, Eric Noulard, Claire Pagetti
Int’l Conf. on Architecture of Computing Systems (ARCS), March 2012
Time Analysable Synchronisation Techniques for Parallelised Hard Real-Time Applications
Mike Gerdes, Florian Kluge, Theo Ungerer, Christine Rochange, Pascal Sainrat
Design, Automation and Test in Europe (DATE), March 2012

2011

RTOS support for execution of parallelized hard real-time tasks on the MERASA multi-core processor
Julian Wolf, Mike Gerdes, Florian Kluge, Sascha Uhrig, Jörg Mische, Stefan Metzlaff, Christine Rochange, Hugues Cassé, Pascal Sainrat, Theo Ungerer
Journal on Computer Systems Science & Engineering, Vol. 26 N. 6, p. 20-36, November 2011
A Design Approach for Predictable and Efficient Multi-Core Processor for Avionics
Hicham Agrou, Marc Gatti, Pascal Sainrat, Patrice Toillon
Digital Avionics Systems Conference (DASC), October 2011
A framework for the timing analysis of dynamic branch predictors
Claire MaĂŻza, Christine Rochange
Int’l Conf. on Real-Time and Network Systems (RTNS 2011), September 2011
Predictable Bus Arbitration Schemes for Heterogeneous Time-Critical Workloads Running on Multicore Processors
Roman Bourgade, Christine Rochange, Pascal Sainrat
Emerging Technologies and Factory Automation (ETFA 2011) - WiP session, September 2011
Validation of real-time properties of a robotic software architecture
Charles Lesire, David Doose, Hugues Cassé
Conference on Control Architectures of Robots (CAR 2011), May 2011
An overview of approaches towards the timing analysability of parallel architectures
Christine Rochange
Bringing Theory to Practice : Workshop on Predictability and Performance in Embedded Systems (PPES), March 2011
Fast Instruction-Accurate Simulation with SimNML
Hugues Cassé, Jonathan Barre, Rodolphe Vaillant-David, Pascal Sainrat
Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO), January 2011

2010

Partial Flow Analysis with oRange
Marianne de Michiel, Armelle Bonenfant, Clément Ballabriga, Hugues Cassé
4th Int’l Symp. On Leveraging Applications of Formal Methods, Verification and Validation (ISoLA), October 2010
OTAWA: an Open Toolbox for Adaptive WCET Analysis
Clément Ballabriga, Hugues Cassé, Christine Rochange, Pascal Sainrat
IFIP Workshop on Software Technologies for Future Embedded and Ubiquitous Systems (SEUS), October 2010
MBBA: a Multi-Bandwidth Bus Arbiter for hard real-time
Roman Bourgade, Christine Rochange, Marianne de Michiel, Pascal Sainrat
5th Int’l Conf. on Embedded and Multimedia Computing (EMC-10), August 2010
A Design Flow for Critical Embedded Systems
Vincent Lefftz, Jean Bertrand, Hugues Cass?, Christophe Clienti, Philippe Coussy, Laurent Maillet-Contoz, Philippe Mercier, Pierre Moreau, Laurence Pierre, Emmanuel Vaumorin
IEEE Int’l Symp. on Industrial Embedded Systems (SIES), July 2010
WCET Analysis of a Parallel 3G Multigrid Solver Executed on the MERASA Multi-core
Christine Rochange, Armelle Bonenfant, Pascal Sainrat, Mike Gerdes, Julian Wolf, Theo Ungerer, Zlatko Petrov, Frantisek Mikulu
10th Int’l Workshop on Worst-Case Execution Time Analysis, July 2010
An automatic parametric approach for WCET analysis of C programs
Djemai Kebbal
Int’l Conf. on Embedded Real Time Software and Systems (ERTS2), May 2010
A framework to experiment optimizations for real-time and embedded software
Hugues Cassé, Karine Heydemann, Haluk Ozaktas, Jonathan Ponroy, Christine Rochange, Olivier Zendra
Int’l Conf. on Embedded Real Time Software and Systems (ERTS2), May 2010
RTOS Support for Parallel Execution of Hard Real-Time Applications on the MERASA Multi-Core Processor
Julian Wolf, Mike Gerdes, Sascha Uhrig, Jörg Mische, Florian Kluge, Stefan Metzlaff, Christine Rochange, Hugues Cassé, Pascal Sainrat, Theo Ungerer
Int’l Symp. on Object/component/service-oriented Real-time distributed computing (ISORC), May 2010
Experimentation of WCET computation on both ends of automotive processor range
Hugues Cassé, Pascal Sainrat, Clément Ballabriga, Marianne De Michiel
Workshop on Critical Automotive applications: Robustness and Safety (CARS), April 2010

2009

Impact of Code Compression on Estimated Worst-Case Execution Times
Haluk Ozaktas, Karine Heydemann, Christine Rochange, Hugues Cassé
Int’l Conference on Real-Time Networks and Systems, October 2009
A Versatile Generator of Instruction Set Simulators and Disassemblers
Tahiry Ratsiambahotra, Hugues Cassé, Pascal Sainrat
Int’l Symp. on Performance Evaluation of Computer and Telecommunication Systems (SPECTS), July 2009
A Generic Framework for Blackbox Components in WCET Computation
Clément Ballabriga, Hugues Cassé, Marianne de Michiel
9th Workshop on Worst-Case Execution Time Analysis, July 2009

2008

Accurate analysis of memory latencies for WCET estimation
Roman Bourgade, Clément Ballabriga, Hugues Cassé, Christine Rochange, Pascal Sainrat
Int’l Conference on Real-Time and Network Systems (RTNS), October 2008
Static loop bound analysis of C programs based on flow analysis and abstract interpretation
Marianne De Michiel, Armelle Bonenfant, Hugues Cassé, Pascal Sainrat
IEEE Int’l Conf. on Embedded and Real-Time Computing Systems and Applications (RTCSA), August 2008
An Architecture for the Simultaneous Execution of Hard Real-Time Threads
Jonathan Barre, Christine Rochange, Pascal Sainrat
International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (IC-SAMOS), July 2008
Improving the First-Miss Computation in Set-Associative Instruction Caches
Clément Ballabriga, Hugues Cassé
Euromicro Conference on Real-Time Systmes (ECRTS), July 2008
Improving the WCET computation time by IPET using control flow graph partitioning
Clément Ballabriga, Hugues Cassé
8th Int’l Workshop on WCET Analysis, July 2008
Inter-Task WCET computation for A-way Instruction Caches
Fadia Nemer, Hugues Cassé, Pascal Sainrat, Jean-Paul Bahsoun
IEEE Int’l Symposium on Industrial Embedded Systems (SIES’08), June 2008
An Improved Approach for Set-associative Instruction Cache Partial Analysis
Clément Ballabriga, Hugues Cassé, Pascal Sainrat
ACM Symposium on Applied Computing (SAC), Track on Software Verification, March 2008
A Predictable Simultaneous Multithreading Scheme for Hard Real-Time
Jonathan Barre, Christine Rochange, Pascal Sainrat
21st International Conference on Architecture of Computing Systems (ARCS’08), February 2008

2007

A Context-Parameterized Model for Static Analysis of Execution Times
Christine Rochange, Pascal Sainrat
Transactions on High-Performance Embedded Architectures and Compilers, 2(3), Springer, October 2007
On the Complexity of Modelling Dynamic Branch Predictors when Computing Worst-Case Execution Times
Claire Burguière, Christine Rochange
ERCIM/DECOS Workshop on Dependable Embedded Systems, August 2007
Improving the WCET accuracy by inter-task instruction cache analysis
Fadia Nemer, Hugues Cassé, Pascal Sainrat, Ali Awada
IEEE Int’l Symposium on Industrial Embedded Systems (SIES’2007), July 2007
Automatic Amortised Worst-Case Execution Time Analysis
Christoph A. Herrmann, Armelle Bonenfant, Kevin Hammond, Steffen Jost, Hans-Wolfgang Loidl, Robert Pointon
7th Workshop on Worst-Case Execution Time Analysis, July 2007
OTAWA, Open Tool for Adaptative WCET Analysis
Hugues Cassé, Christine Rochange
University Booth at DATE 2007 (Design, Automation and Test in Europe), April 2007
On the sensitivity of WCET estimates to the variability of basic blocks execution times
Hugues Cassé, Christine Rochange, Pascal Sainrat
15th International Conference on Real-Time and Network systems, March 2007
WCET computation on software components by partial static analysis
Clément Ballabriga, Hugues Cassé, Pascal Sainrat
Junior Researcher Workshop on Real-Time Computing, March 2007
High-Performance Embedded Architecture and Compilation Roadmap
Koen De Bosschere, Wayne Luk, Xavier Martorell, Nacho Navarro, Mike O’Boyle, Dionisos Pnevmatikatos, Alex Ramirez, Pascal Sainrat, AndrĂ© Seznec, Per Stenström, Olivier Temam
Transactions on High-Performance Embedded Architecture and Compilation, Springer, 1(1), January 2007

2006

Modeling Instruction-Level Parallelism for WCET Evaluation
Jonathan Barre, CĂ©dric Landet, Christine Rochange, Pascal Sainrat
12th IEEE Int’l Conf. on Embedded and Real-Time Systems and Applications, August 2006
Automatic Flow Analysis using Symbolic Execution and Path Enumeration
Djemai Kebbal
3rd International Workshop on Embedded Computing, August 2006
PapaBench : A Free Real-Time Benchmark
Fadia Nemer, Hugues Cassé, Pascal Sainrat, Jean-Paul Bahsoun, Marianne De Michiel
6th Workshop on Worst-Case Execution Time Analysis, July 2006
Combining Symbolic Execution and Path Enumeration in Worst-Case Execution Time Analysis
Djemai Kebbal, Pascal Sainrat
6th Workshop on Worst-Case Execution Time Analysis, July 2006
History-based Schemes and Implicit Path Enumeration
Claire Burguière, Christine Rochange
6th Workshop on Worst-Case Execution Time Analysis, July 2006
Code padding to improve the WCET calculability
Christine Rochange, Pascal Sainrat
14th Int’l Conference on Real-Time and Network Systems, May 2006
OTAWA, a framework for experimenting WCET computations
Hugues Cassé, Pascal Sainrat
3rd European Congress on Embedded Real-Time Software, January 2006

2005

RĂ©gulation du flot d’instructions pour des processeurs orientĂ©s temps-rĂ©el
Christine Rochange, Pascal Sainrat
Technique et Science Informatiques, vol. 24, n°8, December 2005
A Case for Static Branch Prediction in Real-Time Systems
Claire Burguière, Christine Rochange, Pascal Sainrat
11th IEEE Int. Conf. on Embedded and Real-Time Computing Systems and Applications, August 2005
A Time-Predictable Execution Mode for Superscalar Pipelines with Instruction Prescheduling
Christine Rochange, Pascal Sainrat
ACM International Conference on Computing Frontiers, May 2005
ModĂ©lisation d’un prĂ©dicteur de branchement bimodal dans le calcul du WCET par la mĂ©thode IPET
Claire Burguière, Christine Rochange
13th International Conference on Real-Time Systems, April 2005
Analysing branch mispredictions related to algorithmic constructs
Claire Burguière, Christine Rochange
Technical Report IRIT-2005-12-R, April 2005
A contribution to branch prediction modeling in WCET analysis
Claire Burguière, Christine Rochange
DATE’05 (Design, Automation and Test in Europe), March 2005
Dissecting Execution Traces to Understand Long Timing Effects
Christine Rochange, Pascal Sainrat
Technical Report IRIT-2005-6-R, February 2005
CBSP: a Predictor of Sequences of Correlated Branches
Thierry Haquin, Christine Rochange, Pascal Sainrat
Computing Letters (CoLe), vol. 1 n?1, January 2005