IRIT - UMR 5505

Francais
CNRS
INPT
UPS
UT1
UTM
  Bandeau IRIT
 

  Bonenfant Armelle


  Status : Permanent
  Service / Team :  Research group on Architecture and Compilation for Embedded Systems
  Contact : bonenfant@irit.fr
  Localization : IRIT2 / Level 4, Office: 467
  Phone : +33 (0)5 61 55 6360
  Publications : Publications

 

 

Research

 Research Topics

Loop bound analysis, Timing analysis, Annotation language, Infeasible Paths, Worst-Case Execution Time computation, Static Analysis, Cost Model, Embedded Systems

 

 Current Research Activities

  • Static analysis for loop bounds
  • Annotation Language
  • ANR W-SEPT Improving WCET accuracy by taking into account high level (design methods) and C code level (static analysis).

 

 Research Experience

 

 Collaborations

  • University of St Andrews
  • Technical University of Vienna
  • Verimag, Grenoble et Inria (ALF), Rennes et Continental, Toulouse

 

Top

 

Teaching

See in french version

 

Top