Traces is a Research group on Architectures and Compilers for Embedded Systems
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- People
- Research
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Papers
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2005
- A Case for Static Branch Prediction in Real-Time Systems
- A contribution to branch prediction modeling in WCET analysis
- A Time-Predictable Execution Mode for Superscalar Pipelines with Instruction Prescheduling
- Analysing branch mispredictions related to algorithmic constructs
- CBSP: a Predictor of Sequences of Correlated Branches
- Dissecting Execution Traces to Understand Long Timing Effects
- Modélisation d’un prédicteur de branchement bimodal dans le calcul du WCET par la méthode IPET
- Régulation du flot d’instructions pour des processeurs orientés temps-réel
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2006
- Automatic Flow Analysis using Symbolic Execution and Path Enumeration
- Code padding to improve the WCET calculability
- Combining Symbolic Execution and Path Enumeration in Worst-Case Execution Time Analysis
- History-based Schemes and Implicit Path Enumeration
- Modeling Instruction-Level Parallelism for WCET Evaluation
- OTAWA, a framework for experimenting WCET computations
- PapaBench : A Free Real-Time Benchmark
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2007
- A Context-Parameterized Model for Static Analysis of Execution Times
- Automatic Amortised Worst-Case Execution Time Analysis
- High-Performance Embedded Architecture and Compilation Roadmap
- Improving the WCET accuracy by inter-task instruction cache analysis
- On the Complexity of Modelling Dynamic Branch Predictors when Computing Worst-Case Execution Times
- On the sensitivity of WCET estimates to the variability of basic blocks execution times
- OTAWA, Open Tool for Adaptative WCET Analysis
- WCET computation on software components by partial static analysis
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2008
- A Predictable Simultaneous Multithreading Scheme for Hard Real-Time
- Accurate analysis of memory latencies for WCET estimation
- An Architecture for the Simultaneous Execution of Hard Real-Time Threads
- An Improved Approach for Set-associative Instruction Cache Partial Analysis
- Improving the First-Miss Computation in Set-Associative Instruction Caches
- Improving the WCET computation time by IPET using control flow graph partitioning
- Inter-Task WCET computation for A-way Instruction Caches
- Static loop bound analysis of C programs based on flow analysis and abstract interpretation
- 2009
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2010
- A Design Flow for Critical Embedded Systems
- A framework to experiment optimizations for real-time and embedded software
- An automatic parametric approach for WCET analysis of C programs
- Experimentation of WCET computation on both ends of automotive processor range
- MBBA: a Multi-Bandwidth Bus Arbiter for hard real-time
- OTAWA: an Open Toolbox for Adaptive WCET Analysis
- Partial Flow Analysis with oRange
- RTOS Support for Parallel Execution of Hard Real-Time Applications on the MERASA Multi-Core Processor
- WCET Analysis of a Parallel 3G Multigrid Solver Executed on the MERASA Multi-core
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2011
- A Design Approach for Predictable and Efficient Multi-Core Processor for Avionics
- A framework for the timing analysis of dynamic branch predictors
- An overview of approaches towards the timing analysability of parallel architectures
- Fast Instruction-Accurate Simulation with SimNML
- Predictable Bus Arbitration Schemes for Heterogeneous Time-Critical Workloads Running on Multicore Processors
- RTOS support for execution of parallelized hard real-time tasks on the MERASA multi-core processor
- Validation of real-time properties of a robotic software architecture
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2012
- Deterministic Execution Model on COTS Hardware
- Normalisation of Loops with Covariant Variables
- Operating Systems for Manycore Processors from the Perspective of Safety-Critical Systems
- The Split-Phase Synchronisation Technique: Reducing the Pessimism in the WCET Analysis of Parallelised Hard Real-Time Programs
- Time Analysable Synchronisation Techniques for Parallelised Hard Real-Time Applications
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2005
- Projects
- Tools
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Links
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Calls for papers
- 12th Int’l workshop on Worst-Case Execution Time (WCET) Analysis
- 18th IEEE Real-Time and Embedded Technology and Applications Symposium
- 20th International Conference on Real-Time Networks and Systems
- 28th ACM Symposium on Applied Computing, track on Embedded Systems
- 33rd IEEE Real-Time Systems Symposium
- 8th Int’l Conf. on High-Performance and Embedded Architectures and Compilers
- ACM Conference on Languages, Compilers, and Tools for Embedded Systems
- ACM Int. Conf. on Computing Frontiers
- ACM/IEEE International Symposium on Code Generation and Optimization
- Design, Automation and Test in Europe
- Embedded Real Time Software and Systems
- Euromicro Conference on Real-Time Systems
- Int’l Conference on Compilers, Architecture and Synthesis for Embedded Systems
- Int’l Conference on Embedded and Real-Time Computing Systems and Applications
- Int’l Conference on Embedded Software
- Int’l Conference on Emerging Technologies and Factory Automation
- Int’l Conference on Hardware-Software Codesign and System Synthesis
- Int’l Workshop on Software and Compilers for Embedded Systems
- International Conference on Architecture of Computing Systems
- International Symposium on Computer Architecture
- International Symposium on Systems, Architectures, MOdeling and Simulation
- Symposium on Industrial Embedded Systems
- Workshop on High-performance and real-time embedded systems
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Calls for papers
